DECODING RE-CONFIGURABLE PROCESSOR ARCHITECTURES

Abstract

There have been significant advancements in the designs of processors and the tools used to produce and modify them. The issues related to using wall, dark silicon, and hardware reconfiguration along with code change have motivated progress in this area. These factors are crucial for microprocessor-based electronic projects and products that need significant, real-time, and mobile computational power in today's world. Efforts have also been made to lower the communication overhead in key areas of code through the use of specialized hardware and significantly decrease the fetch decode cycle. Recent studies have demonstrated that addressing both types of communication delays and addressing the issue of dark silicon can enhance power efficiency by 7 to 1000 times.